JPH0751800Y2 - 光電変換素子 - Google Patents

光電変換素子

Info

Publication number
JPH0751800Y2
JPH0751800Y2 JP1988122049U JP12204988U JPH0751800Y2 JP H0751800 Y2 JPH0751800 Y2 JP H0751800Y2 JP 1988122049 U JP1988122049 U JP 1988122049U JP 12204988 U JP12204988 U JP 12204988U JP H0751800 Y2 JPH0751800 Y2 JP H0751800Y2
Authority
JP
Japan
Prior art keywords
photoelectric conversion
resin
conversion chip
chip
photodiode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1988122049U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0242448U (en]
Inventor
哲也 冨永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP1988122049U priority Critical patent/JPH0751800Y2/ja
Publication of JPH0242448U publication Critical patent/JPH0242448U/ja
Application granted granted Critical
Publication of JPH0751800Y2 publication Critical patent/JPH0751800Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP1988122049U 1988-09-17 1988-09-17 光電変換素子 Expired - Lifetime JPH0751800Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988122049U JPH0751800Y2 (ja) 1988-09-17 1988-09-17 光電変換素子

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988122049U JPH0751800Y2 (ja) 1988-09-17 1988-09-17 光電変換素子

Publications (2)

Publication Number Publication Date
JPH0242448U JPH0242448U (en]) 1990-03-23
JPH0751800Y2 true JPH0751800Y2 (ja) 1995-11-22

Family

ID=31369614

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988122049U Expired - Lifetime JPH0751800Y2 (ja) 1988-09-17 1988-09-17 光電変換素子

Country Status (1)

Country Link
JP (1) JPH0751800Y2 (en])

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55158681A (en) * 1979-05-29 1980-12-10 Matsushita Electric Ind Co Ltd Solar cell both sides of which are illuminated
JPS6079756U (ja) * 1983-11-04 1985-06-03 三洋電機株式会社 光半導体装置

Also Published As

Publication number Publication date
JPH0242448U (en]) 1990-03-23

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